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VHDL is an acronym which stands for VHSIC Hardware Description Language. VHSIC is yet another achronym which stands for
Very High Speed Integrated Circuits. If you can remember that, then you're off to a good start. The language has been known
to be somewhat complicated, as its title (as titles go). The acronym does have a purpose, though; it is supposed to capture
the entire theme of the language, that is to describe hardware much the same way we use schematics.
VHDL can wear many
hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the
key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort.
In addition to being used for each of these purposes, VHDL can be used to take three different approaches to describing hardware.
These three different approaches are the structural, data flow, and behavioral methods of hardware description. Most of the
time a mixture of the three methods are employed. The following sections introduce you to the language by examining its use
for each of these three methodologies. There are also certain guidelines that form an approach to using VHDL for synthesis,
which is not addressed by this tutorial.
VHDL is a standard (VHDL-1076) developed by IEEE (Institute of Electrical and Electronics Engineers). The language has
been through a few revisions, and you will come across this in the VHDL community.
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